This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 11-246169, filed Aug. 31, 1999, the entire contents of which are incorporated herein by reference.
The present invention relates to a capacitor having a dielectric film containing at least either Ba or Sr materials in addition to Ti and O, and method for manufacturing the capacitor.
With the miniaturization and high integration of electronic devices, it is becoming difficult to attain the functions of electronic devices by merely circuit composition alone. For instance, it is becoming extremely difficult to realize SRAM, EEPROM which conduct memory operation of information by combining it with transistors, or semiconductor memories that conduct memory operation of information by combining transistors and capacitors with the conventional MOS transistor or conventional MOS transistor and MOS capacitor since there is a trend to reduce the size of the memory cells composing such elements.
In particular, in the case of semiconductor memory that uses MOS capacitor, it becomes extremely difficult to continue securing a certain capacitance in order not to lower the SN ratio of the signals read out even if the minimum fabrication dimensions of the elements become small. Thus, instead of achieving the functions of the electronic devices by merely the circuit composition alone, the utilization of the characteristics of the material itself by using functional films is becoming effective.
For instance, as capacitor insulation film of the MOS capacitor, the adoption of insulation films comprising functional materials such as BaXSr1xe2x88x92XTiO3 [0 less than X less than 1] (BST), SrTiO3 (STO), BaTiO3 (BTO) which have higher dielectric constants than the silicone oxide films or silicone nitride films, is being studied. Since the above-mentioned BST, STO, and BTO reveal dielectric constants exceeding several hundreds at room temperature, they become promising as dielectric films for DRAM of which the securing of sufficient capacitor area is becoming difficult if improvement in the degree of integration is to be advanced.
In case of forming capacitor elements for semiconductor integrated circuits having high degree of integration by using BST of hypercomplex system, as a deposition method of BST, the chemical vapor deposition method (CVD Method) is suitable. In other words, by using the CVD method, since accurate controllability of the composition, reproducibility of the process, and excellent coverage of level difference can be obtained. Thus, the reliability of the electronic devices can be improved considerably.
In order to form BST films that are metal oxide films of hypercomplex system, feed rate-controlling conditions of which the control of composition is easy, are generally used. However, in the case of CVD method of the feed rate-controlling, the level difference coverage will drop. Thus, formation of BST films based on the reaction rate-controlling CVD method has been proposed. (Japanese Patent Application No. 7-50104)
However, in case films are formed by the MO-CVD method at a temperature below 500xc2x0 C. that is the actual reaction rate-controlling condition, the organic substances in the raw material gases remain in the film after crystallization, and cause an increase in the leakage current.
Furthermore, unless sufficient oxygen is supplied at the time the film is formed, oxygen deficiency occurs in the film after crystallization, and there were problems such as causing increase in leakage current.
As a result, in the vicinity of practical electric field of about 1V, there were problems that a leakage current of 1xc3x9710xe2x88x927 A/cm2 or less could not be achieved at a film thickness of 30 nm, and a dielectric constant of 300 or above, normally used for the memory devices of 1G bit generation and after.
The object of the present invention is to provide a manufacturing method for a capacitor that suppresses the increase in leakage current by controlling the organic residues in the film even in case the dielectric film deposited in an amorphous state is crystallized in a dielectric film containing at least either Ba or Sr materials in addition to Ti and O.
Furthermore, another objective of the present invention is to provide a capacitor having a leakage current of 1xc3x9710xe2x88x927 A/cm2 or less at about 1V.
The present invention is composed as mentioned below in order to achieve the aforementioned objectives.
(1) The capacitor related to the present invention has a lower electrode, a dielectric film provided on the lower electrode and made mainly of crystal containing at Ti, O and at least one element selected from the group consisting of Ba and Sr, and an upper electrode provided on the dielectric film; wherein the dielectric film includes a layer which contacts the upper electrode. In case the dielectric film which has a thickness of at least 5 nm and exhibits a first-order differential spectrum measured by means of Auger electron spectroscopy, and the in the first-order differential spectrum, a ratio A/B is at most 0.3, where A is the absolute value A of a difference between a third peak appearing near 420 eV and a fourth peak appearing at a higher energy level and near the third peak, and B is the absolute value B of a difference between a first peak appearing near 410 eV and a third peak appearing at a lower energy level and near the first level.
Desirable embodiments of the capacitor related to the present invention are described below.
(1a) The crystal is one selected among BaXSr1xe2x88x92XTiO3, SrTiO3, and BaTiO3.
(1b) The upper electrode contains one element selected from the group consisting of Sr, Ru, Pt, or O.
(2) A method of manufacturing a capacitor related to the present invention, comprising the steps of: forming a lower electrode; depositing a dielectric film on the lower electrode, the dielectric film having an amorphous structure made mainly of crystal containing at Ti, O and at least one element selected from the group consisting of Ba and Sr; annealing the dielectric film in an oxidizing atmosphere at a temperature lower than crystallization point of the amorphous structure; annealing the dielectric film at a temperature equal to or higher than the crystallization point of the amorphous structure, thereby crystallizing the amorphous structure; and depositing an upper electrode on the dielectric film.
Desirable embodiments of the capacitors related to the present invention are described below:
(2a) The dielectric film is an amorphousxe2x80x94structure film selected from among BaXSr1xe2x88x92XTiO3, SrTiO3, and BaTiO3.
(2b) The step of depositing the upper electrode is conducted in an atmosphere containing oxygen.
The upper electrode is made of one element selected from the group consisting of Sr, Ru and Pt.
(2c) The upper electrode is annealed in an oxidizing atmosphere after the upper electrode is deposited. The annealing may be performed, not after the upper electrode is processed and an inter layer insulating film is deposited on the upper electrode processed.
The upper electrode comprises at least one material from the group consisting of Sr, Ru and Pt, in addition to a material containing O.
The upper electrode is annealed at a temperature ranging of 85xc2x0 C.-300xc2x0 C.
Based on the above composition, the present invention possesses the following action and effect.
After forming a dielectric film in the amorphous state, by conducting annealing at a temperature below the crystallization point in an oxygen atmosphere, the organic substances in the film are released. Subsequently, by conducting annealing at a temperature above the crystallization point, a dielectric film containing no organic residues can be formed, and the increase in leakage current can be suppressed.
Furthermore, by forming an upper electrode containing one substance out of Sr, Ru, Pt, and O in the upper electrode, or by forming a film with Sr, Ru, and Pt in an atmosphere containing oxygen, the oxygen deficiency of the dielectric film can be suppressed.
By the dielectric film in contact with the upper electrode having a film thickness of 5 nm or above, and the ratio of A/B obtained by the AES being 0.3, the voltage range in the relaxation current region will be broadened, and it is possible to achieve a leakage current of 1xc3x9710xe2x88x927 A/cm2 or less at around 1V.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.